freemyipod r910 - Code Review

Jump to: navigation, search
Repository:freemyipod
Revision:r909‎ | r910 | r911 >
Date:08:20, 26 March 2014
Author:user890104
Status:new
Tags:
Comment:
UMSboot: Remove some accidentally created files
Modified paths:
  • /umsboot/src/soc/s5l87xx/startup.S~ (deleted) (history)
  • /umsboot/src/target/umsboot/ipodclassic/target.h~ (deleted) (history)

Diff [purge]

Index: umsboot/src/soc/s5l87xx/startup.S~
@@ -1,230 +0,0 @@
2 -#define ASM_FILE
3 -#include "global.h"
4 -
5 -
6 -#ifndef SOC_S5L8701
7 -#ifndef PAGETABLE_BASEADDR
8 -#define PAGETABLE_BASEADDR DEFAULT_PAGETABLE_BASEADDR
9 -#endif
10 -#endif
11 -
12 -
13 -.syntax unified
14 -
15 -
16 -.extern _text_size
17 -.extern _bss
18 -.extern _bss_offset
19 -.extern _dmabss
20 -.extern _dmabss_offset
21 -.extern _undef_instr_handler
22 -.extern _syscall_handler
23 -.extern _prefetch_abort_handler
24 -.extern _data_abort_handler
25 -.extern _reserved_handler
26 -.extern _irq_handler
27 -.extern _fiq_handler
28 -
29 -
30 -.global _vectors
31 -.section .vectors,"ax",%progbits
32 -_vectors:
33 - b _reset_handler
34 - b _undef_instr_handler
35 - b _syscall_handler
36 - b _prefetch_abort_handler
37 - b _data_abort_handler
38 - b _reserved_handler
39 - b _irq_handler
40 - b _fiq_handler
41 -
42 -_reset_handler:
43 - @ Check if we need to relocate ourselves
44 - adr r0, _vectors
45 - ldr r1, =_vectors
46 - cmp r0, r1
47 - beq _relocated
48 - @ Move around as necessary
49 - ldr r2, =(_text_size + 31)
50 - mov r2, r2,lsr#5
51 -_copy:
52 - ldmia r0!, {r4-r11}
53 - stmia r1!, {r4-r11}
54 - subs r2, r2, #1
55 - bne _copy
56 -_relocated:
57 -#ifdef SOC_S5L8701
58 - @ Detect execution base address and remap memory at 0x0 accordingly (for IRQ vectors)
59 - tst r1, #0x20000000
60 - ldr r1, =0x38200000
61 - ldr r0, [r1]
62 - orr r0, r0, #1
63 - bicne r0, r0, #0x10000
64 - orreq r0, r0, #0x10000
65 - str r0, [r1]
66 -#endif
67 -
68 - @ Flush caches
69 - mov r0, #0
70 -#if CPU_ARM_ARCH < 6
71 -_cleancache:
72 -#if CPU_ARM_ARCH < 5
73 - mcr p15, 0, r0,c7,c10,2
74 - add r1, r0, #0x10
75 - mcr p15, 0, r1,c7,c10,2
76 - add r1, r1, #0x10
77 - mcr p15, 0, r1,c7,c10,2
78 - add r1, r1, #0x10
79 - mcr p15, 0, r1,c7,c10,2
80 - adds r0, r0, #0x04000000
81 -#else
82 - mrc p15, 0, r15,c7,c10,3
83 -#endif
84 - bne _cleancache
85 -#else
86 - mcr p15, 0, r0,c7,c14,0
87 -#endif
88 - mcr p15, 0, r0,c7,c10,4
89 - mcr p15, 0, r0,c7,c5,0
90 -#if CPU_ARM_ARCH >= 6
91 - mcr p15, 0, r0,c7,c5,4
92 -#endif
93 -
94 -#ifdef SOC_S5L8701
95 - @ Enable caches
96 - mrc p15, 0, r1,c1,c0
97 - orr r1, r1, #0x00001000
98 - orr r1, r1, #0x00000005
99 - mcr p15, 0, r1,c1,c0
100 -#else
101 -#ifdef ENABLE_MMU
102 - @ Disable caches
103 - mrc p15, 0, r3,c1,c0
104 - bic r1, r3, #0x00001000
105 - orr r3, r3, #0x00001000
106 - bic r1, r1, #0x00000005
107 - orr r3, r3, #0x00000005
108 - mcr p15, 0, r1,c1,c0
109 -
110 - @ Flush TLB
111 - mcr p15, 0, r0,c8,c7
112 -
113 - @ Disable remapping of the first 32MB (will be done by the MMU)
114 - mcr p15, 0, r0,c13,c0
115 -
116 - @ Configure MMU
117 - ldr r0, =PAGETABLE_BASEADDR
118 - ldr r1, =0xc1e
119 - ldr r2, =_vectors
120 - add r2, r2, r1
121 - mcr p15, 0, r0,c2,c0
122 - str r2, [r0], #4
123 -_mmuloop:
124 - add r1, r1, #0x00100000
125 - cmp r1, #0x38000000
126 - biccs r1, r1, #0xc
127 - tst r1, #0x40000000
128 - str r1, [r0], #4
129 - beq _mmuloop
130 - mov r0, #-1
131 - mcr p15, 0, r0,c3,c0
132 -
133 - @ Enable caches
134 - mcr p15, 0, r3,c1,c0
135 -#endif
136 -#endif
137 -
138 - @ Jump to final execution address (after relocation)
139 - ldr pc, =_enable_irqs
140 -
141 -_enable_irqs:
142 - @ Mask and clear all IRQs
143 -#ifdef SOC_S5L8701
144 - mov r1, #0x39c00000
145 - str r0, [r1,#4]
146 - str r0, [r1,#8]
147 - str r0, [r1,#0x38]
148 - str r0, [r1,#0x20]
149 - sub r0, r0, #1
150 - str r0, [r1]
151 - str r0, [r1,#0x10]
152 - str r0, [r1,#0x1c]
153 -#else
154 - ldr r1, =0x38e00000
155 - add r2, r1, #0x00001000
156 - add r3, r1, #0x00002000
157 - mov r0, #-1
158 - str r0, [r1,#0x14]
159 - str r0, [r2,#0x14]
160 - str r0, [r1,#0xf00]
161 - str r0, [r2,#0xf00]
162 - str r0, [r3,#0x08]
163 - str r0, [r3,#0x0c]
164 -#endif
165 -
166 - @ Set up stacks and enable IRQs
167 - msr cpsr_c, #0xd2
168 - ldr sp, =_irq_stack_top
169 - msr cpsr_c, #0xd7
170 - ldr sp, =_abort_stack_top
171 - msr cpsr_c, #0xdb
172 - ldr sp, =_abort_stack_top
173 - msr cpsr_c, #0x13
174 - ldr sp, =_stack_top
175 -
176 - @ Zero .bss section
177 - ldr r0, =_bss
178 - mov r1, #0
179 - ldr r2, =_bss_size
180 - bl memset
181 -
182 - @ Zero .dmabss section
183 - ldr r0, =_dmabss
184 - mov r1, #0
185 - ldr r2, =_dmabss_size
186 - bl memset
187 -
188 - @ Run C init code
189 - bl init
190 - @fallthrough
191 -
192 -_idleloop:
193 - mcr p15, 0, r0,c7,c0,4
194 - b _idleloop
195 -.ltorg
196 -
197 -.global idle
198 -.type idle, %function
199 -idle:
200 - mcr p15, 0, r0,c7,c0,4
201 - bx lr
202 -.size idle, .-idle
203 -
204 -
205 -.global reset
206 -.global hang
207 -.type reset, %function
208 -.type hang, %function
209 -reset:
210 -#ifdef SOC_S5L8701
211 - msr cpsr_c, #0xd3
212 - mov r0, #0x110000
213 - add r0, r0, #0xff
214 - add r1, r0, #0xa00
215 - mov r2, #0x3c800000
216 - str r1, [r2]
217 - mov r1, #0xff0
218 - str r1, [r2,#4]
219 - str r0, [r2]
220 -#else
221 - msr cpsr_c, #0xd3
222 - mov r0, #0x100000
223 - mov r1, #0x3c800000
224 - str r0, [r1]
225 -#endif
226 -hang:
227 - msr cpsr_c, #0xd3
228 - mcr p15, 0, r0,c7,c0,4
229 - b hang
230 -.size reset, .-reset
231 -.size hang, .-hang
Index: umsboot/src/target/umsboot/ipodclassic/target.h~
@@ -1,52 +0,0 @@
2 -#ifndef __TARGET_UMSBOOT_IPODCLASSIC_TARGET_H__
3 -#define __TARGET_UMSBOOT_IPODCLASSIC_TARGET_H__
4 -
5 -#include "board/ipodclassic/target.h"
6 -#include "soc/s5l87xx/regs.h"
7 -
8 -#define SDRAM_SIZE 0
9 -#define ENABLE_MMU
10 -
11 -#define CODE_REGION SRAM
12 -#define BSS_REGION SRAM
13 -
14 -#define S5L87XX_SYNOPSYSOTG_ENABLE
15 -
16 -#define UMSBOOT_HAVE_CONSOLE
17 -
18 -#define UMSBOOT_USB_DRIVER_HEADER "core/synopsysotg/synopsysotg.h"
19 -#define UMSBOOT_USB_DRIVER synopsysotg_driver
20 -#define UMSBOOT_USB_DRIVER_CONFIG_TYPE const struct synopsysotg_config
21 -#define UMSBOOT_USB_DRIVER_CONFIG \
22 -{ \
23 - .core = (struct synopsysotg_core_regs*)OTGBASE, \
24 - .phy_16bit = true, \
25 - .phy_ulpi = false, \
26 - .use_dma = true, \
27 - .shared_txfifo = true, \
28 - .disable_double_buffering = false, \
29 - .fifosize = 1024, \
30 - .txfifosize = { 0x200, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, \
31 -}
32 -#define UMSBOOT_USB_DRIVER_STATE_TYPE struct synopsysotg_state
33 -#define UMSBOOT_USB_DRIVER_STATE \
34 -{ \
35 - .endpoints = { {}, {}, {} }, \
36 -}
37 -#define UMSBOOT_USB_VENDORID 0xffff
38 -#define UMSBOOT_USB_VENDORSTRING { 'f', 'r', 'e', 'e', 'm', 'y', 'i', 'p', 'o', 'd', '.', 'o', 'r', 'g' }
39 -#define UMSBOOT_USB_VENDORSTRING_LEN 16
40 -#define UMSBOOT_USB_PRODUCTID 0x5562
41 -#define UMSBOOT_USB_PRODUCTSTRING { 'U', 'M', 'S', 'b', 'o', 'o', 't' }
42 -#define UMSBOOT_USB_PRODUCTSTRING_LEN 7
43 -#define UMSBOOT_USB_DEVICEREVISION 2
44 -#define UMSBOOT_USB_MAXCURRENT 100
45 -#define UMSBOOT_ENDPOINT_OUT 2
46 -#define UMSBOOT_ENDPOINT_IN 1
47 -
48 -#define RAMDISK_BASEADDR 0x08000000
49 -#define RAMDISK_SECTORSIZE 4096
50 -#define RAMDISK_SECTORS 16384
51 -#define RAMDISK_PTR_ADDR 0x2203fffc
52 -
53 -#endif