Difference between revisions of "S5L8702 clock gates"
Benedikt93 (talk | contribs) |
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| − | | | + | | Nand controller (running by default) |
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| 46 | | 46 | ||
| − | | | + | | ChipId (masked by default) |
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| 47 | | 47 | ||
Latest revision as of 02:07, 4 January 2012
| Gate | Function |
|---|---|
| 0 | SHA1 accelerator |
| 1 | LCD controller? |
| 2 | USB-related |
| 3 | Unknown, masking crashes immediately |
| 4 | Unknown, masking crashes after some milliseconds |
| 5 | ATA controller |
| 6 | Unknown (masked by default) |
| 7 | I2S controller |
| 8 | Nand controller (running by default) |
| 9 | Unknown (masked by default) |
| 10 | AES coprocessor |
| 11 | Unknown (masked by default) |
| 12 | Unknown (running by default) |
| 13 | Unknown (running by default) |
| 14 | Unknown (masked by default) |
| 15 | Unknown (masked by default) |
| 16 | Unknown (masked by default) |
| 17 | Unknown (masked by default) |
| 18 | Unknown (masked by default) |
| 19 | Unknown (running by default) |
| 20 | Unknown (running by default) |
| 21 | Unknown (running by default) |
| 22 | Unknown (running by default) |
| 23 | Unknown (running by default) |
| 24 | Unknown (running by default) |
| 25 | DMA controller 0 |
| 26 | Unknown (running by default) |
| 27 | Unknown (running by default) |
| 28 | Unknown (running by default) |
| 29 | Unknown (masked by default) |
| 30 | Unknown (running by default) |
| 31 | Unknown (running by default) |
| 32 | Unknown (masked by default) |
| 33 | Clickwheel controller? |
| 34 | SPI0 (NOR flash) |
| 35 | USB-related |
| 36 | I2C controller 0 |
| 37 | Unknown, masking crashes after some milliseconds |
| 38 | Unknown (masked by default) |
| 39 | Unknown (masked by default) |
| 40 | Unknown (masked by default) |
| 41 | Unknown (masked by default) |
| 42 | Unknown (masked by default) |
| 43 | SPI1? (unconnected) |
| 44 | GPIO controller |
| 45 | Unknown (masked by default) |
| 46 | ChipId (masked by default) |
| 47 | SPI2? (unconnected) |
| 48 | Unknown (masked by default) |
| 49 | Unknown (masked by default) |
